EP1S80B956C7N Altera, EP1S80B956C7N Datasheet - Page 446
EP1S80B956C7N
Manufacturer Part Number
EP1S80B956C7N
Description
IC STRATIX FPGA 80K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S80B956C7N
Number Of Logic Elements/cells
79040
Number Of Labs/clbs
7904
Total Ram Bits
7427520
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Stratix & Stratix GX I/O Banks
4–18
Stratix Device Handbook, Volume 2
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
PCI/PCIX//Compact PCI
AGP 1×
AGP 2×
SSTL-3 Class I
SSTL-3 Class II
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
Differential SSTL-2
(output clocks)
HSTL Class I
1.5-V HSTL Class I
1.8-V HSTL Class I
HSTL Class II
1.5-V HSTL Class II
1.8-V HSTL Class II
Differential HSTL (input
clocks)
Differential HSTL (output
clocks)
GTL
Table 4–2. I/O Standards Supported in Stratix I/O Banks (Part 1 of 2)
I/O Standard
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1
standards in addition to differential SSTL-2 and HSTL (both on the output
clock only). Since Stratix devices support both non-voltage-referenced
and voltage-referenced I/O standards, there are different guidelines
when working with either separately or when working with both.
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I/O Bank
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Enhanced PLL External
9
Clock Output Banks
Altera Corporation
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11
June 2006
12
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