EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 184

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
ZDI Read Only Registers
ZDI Register Definitions
ZDI Read Only Registers lists the ZDI Read Only registers. Many of the ZDI Read Only
addresses are shared with ZDI Write Only registers.
Table 95. ZDI Read Only Registers
ZDI Address Match Registers
The four sets of address match registers are used for setting the addresses for generating
BREAK points. When the accompanying BRK_ADDRX bit is set in the ZDI BREAK
Control register to enable the particular address match, the current eZ80F92 address is
compared with the 3-byte address set, {ZDI_ADDRx_U, ZDI_ADDRx_H,
ZDI_ADDR_x_L}. If the CPU is operating in ADL mode, the address is supplied by
ADDR[23:0]. If the CPU is operating in Z80 mode, the address is supplied by
{MBASE[7:0], ADDR[15:0]}. If a match is found, ZDI issues a BREAK to the eZ80F92
device placing the processor in ZDI mode pending further instructions from the ZDI inter-
face block. If the address is not the first op-code fetch, the ZDI BREAK is executed at the
end of the instruction in which it is executed. There are four sets of address match regis-
ters. They can be used in conjunction with each other to BREAK on branching instruc-
tions. See ZDI Address Match Registers ZDI_ADDR0_L = 00h, ZDI_ADDR0_H = 01h,
ZDI_ADDR0_U = 02h, ZDI_ADDR1_L = 04h, ZDI_ADDR1_H = 05h, ZDI_ADDR1_U
= 06h, ZDI_ADDR2_L = 08h, ZDI_ADDR2_H = 09h, ZDI_ADDR2_U = 0Ah,
ZDI
Address
00h
01h
02h
03h
10h
11h
12h
17h
20h
ZDI Register Name
ZDI_ID_L
ZDI_ID_H
ZDI_ID_REV
ZDI_STAT
ZDI_RD_L
ZDI_RD_H
ZDI_RD_U
ZDI_BUS_STAT
ZDI_RD_MEM
P R E L I M I N A R Y
ZDI Register Function
eZ80 Product ID Low Byte register
eZ80 Product ID High Byte register
eZ80 Product ID Revision register
Status register
Read Memory Address Low Byte
register
Read Memory Address High Byte
register
Read Memory Address Upper Byte
register
Bus Status register
Read Memory Data Value
Product Specification
ZiLOG Debug Interface
eZ80F92/eZ80F93
Reset
Value
07h
00h
XXh
00h
XXh
XXh
XXh
00h
XXh
172