EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 89

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
Watch-Dog Timer Reset Register
The Watch-Dog Timer Reset register, detailed in Watch-Dog Timer Reset Register, is an 8-
bit Write Only register. The Watch-Dog Timer is reset when an
is written to this register. Any amount of time can occur between the writing of the
value and the
Bit
Position
2
[1:0]
WDT_PERIOD
Note: *RST_FLAG is only cleared by a non-WDT RESET.
Bit
Reset
CPU Access
Note: X = Undefined; W = Write only.
Bit
Position
[7:0]
WDT_RR
5Ah
Value Description
0
00
01
10
11
Value Description
A5h
5Ah
value, so long as the WDT time-out does not occur prior to completion.
Table 28. Watch-Dog Timer Reset Register
Reserved.
WDT time-out period is 2
WDT time-out period is 2
WDT time-out period is 2
WDT time-out period is 2
The first Write value required to reset the WDT prior to a time-
out.
The second Write value required to reset the WDT prior to a
time-out. If an A5h, 5Ah sequence is written to WDT_RR, the
WDT timer is reset to its initial count value, and counting
resumes.
W
P R E L I M I N A R Y
X
7
(WDT_RR = 0094h)
W
6
X
W
X
5
27
25
22
18
W
X
4
clock cycles.
clock cycles.
clock cycles.
clock cycles.
W
X
3
A5h
Product Specification
value followed by
W
X
2
eZ80F92/eZ80F93
Watch-Dog Timer
W
X
1
A5h
W
X
0
5Ah
77