SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 16

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

0xC100 to 0xE800 by default. However, the Extended Memory Control can be used to configure multiple windows for external
ROM set-up.
Note: The Address space from 0x8000-0xC100 can also be used as the external ROM (see the External Memory Control set-up
for more detail).
4.3
The SL11R contains a 1.5Kx16 internal RAM. This memory is used to buffer video data and USB packets and is accessed by the
16-bit processor and the SIE (Serial Interface Engine). USB transactions are automatically routed to the memory buffer. The 16-bit
processor has the ability to set up pointers and block sizes in buffer memory for USB DMA transactions. For example, video data
can be read from the camera interface and is sent to the USB port by the internal DMA engine. The SL11R BIOS uses this internal
RAM for USB buffers, BIOS variables and user data/code. Executable code or data can reside in multiple locations: internal
masked ROM (3Kx16), internal RAM (3Kx8), external ROM and external SRAM. Program code or data can also be loaded to
either the internal or the external RAM from the USB port, the RS232 port, or the 2-wire serial interface.
The SL11R Internal RAM is mapped from 0x0000 to 0x0BFF. See internal RAM memory usage in Table 2 below:
Table 4-2. Internal RAM Memory Usage
Note:
4.4
The SL11R has an option to use either a 48-MHz or 12-MHz external crystal or oscillator as its clock source. SL11R includes an
internal PLL that can be configured by software. At power-up, the SL11R BIOS default configuration sets the processor clock to
run at 2/3 of X1 (of the external provided clock).
Example 1 Changing SL11R CPU Speed
Document #: 38-08006 Rev. **
0x0000 - 0x00FF
0x0100 - 0x01FF
0x0200 - 0x021F
0x0220 - 0x0343
0x0344 - 0x0BFF
2.
• The addresses from 0x0000 to 0x00FF are reserved for hardware and software interrupt vectors (see [Ref. 1] SL11R_BIOS
• Addresses from 0x0100 to 0x01FF are reserved for Internal Register Banks (SL11R register R0-R15 bank 0 and R0-R15 bank
• Addresses from 0x0200 to 0x021F are reserved for the hardware interrupt stack.
• Addresses from 0x0220 to 0x0343 are available internal RAM for application software. Software can be downloaded via the
for more information).
1) and the software stack. Others are reserved for USB Control registers and other read/write control registers.
USB port or UART interface (see [Ref. 1] SL11R_BIOS for more information).
The default of the SL11R BIOS assumes a 48MHz input clock, so the SL11R processor clock is (2/3)*48MHz = 32MHz. See
example below:
If the X1 input clock is 48 MHz, then the maximum speed of the SL11R processor can be set at follows:
If the X1 input clock is 12 MHz, then the maximum speed of the SL11R processor can be set to:
This address may be changed due to SL11R BIOS revision updates. The new SL11R BIOS may require more internal memory for its variable usage in any new
SL11R BIOS.
Internal RAM: 0x0000-0x0BFF
Clock Generator
mov
mov
mov
mov
mov
mov
Address
[2]
[0xC006],0x10
[0xC008],0
[0xC006],0
[0xC008],0
[0xC006],0x40
[0xC008],0
Hardware/Software Interrupts
Register Banks/USB Control/Software Stack
Hardware Interrupts stack
SL11R BIOS internal buffers & variables
User’s Programming Space
;clock = 2/3*X1
;CPU clock at 32MHz
;clock = set up at X1 clock input
;CPU clock at 48MHz
;clock = 4*X1
;CPU clock at 48MHz
Memory Description
Page 16 of 85
SL11R