SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 53

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

Fast EPP Pin Assignment and Description (continued)
Document #: 38-08006 Rev. **
nXROMSEL
nXMEMSEL
nXRAMSEL
UART_RXD
nDRAMWR
UART_TXD
nDRAMOE
Pin Name
nRESET
nDTSRB
nASTRB
X_PCLK
nWRITE
GPIO29
nCASH
SECLK
nCASL
nWRH
nWRL
SEDO
nRAS
nENS
CLKS
TEST
GND
GND
GND
VDD
VDD
nRD
A6
A5
A4
A3
A2
A1
A0
P9
P5
P4
Pin No.
36
37
38
39
40
41
42
43
45
46
47
49
50
51
53
54
55
59
62
63
64
65
66
67
68
69
70
71
72
73
74
44
48
52
56
57
58
60
61
GPIO pins
GPIO31
GPIO30
GPIO29
GPIO28
GPIO27
GPIO26
GPIO25
GPIO24
GPIO23
GPIO22
GPIO21
GPIO20
GPIO19
Pin Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
GND
Input
Input
GND
GND
Input
Bidir
Bidir
Bidir
Bidir
External Memory Address Bus, A6
External Memory Address Bus, A5
External Memory Address Bus, A4
External Memory Address Bus, A3
Digital ground.
External Memory Address Bus, A2
External Memory Address Bus, A1
External Memory Address Bus, A0
No Connection, MFG test only
Active LOW, write to lower bank of External SRAM
Active LOW, Write to upper bank of External SRAM
Active LOW, Read from External SRAM or ROM
Master Reset. SL11R Device active low reset input.
Active low, DRAM Row Address Select
+3.3 VDC Supply
+3.3 VDC Supply
Active LOW, DRAM Column Low Address Select
Active LOW, DRAM Column High Address Select
Active LOW, DRAM Output Enable
Active LOW, DRAM Write
Active LOW, select external SRAM (16 bit)
Active LOW, select external ROM
Active LOW, select external Memory bus, external SRAM, DRAM, ROM or
any memory mapped device
See register 0xC006 for more information
SECLK, Serial EEPROM clock, or GPIO31
SEDO, Serial flash EPROM Data, or GPIO30
This pin requires a 5K Ohm pull-up.
GPIO29
UART Transmit Data (out), or GPIO28
Digital ground.
Digital ground.
UART Receive Data (in), or GPIO27
Serial EPROM control signal
Serial EPROM Clock
EPP Data Strobe
EPP Address Strobe
EPP Write Strobe
P Register
P Register or PWR_OFF
P Register
GPIO & Fast EPP Pin Chip Revision 1.1
Page 53 of 85
SL11R