SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 38

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

4.18.3
This register contains the high order word of the starting DMA address.
Note:
A21 = 1 the starting memory address will be in the DRAM. The A21 bit in the High DMA Stop Address register must match this bit.
4.18.4
This register contains the low order word of the stopping SL11R memory address. This is the last DMA address in memory. DMA
will stop when this address is reached and if the FDMA bit in the Interrupt Enable Register (0xC00E: R/W) is enabled, an interrupt
will also be generated.
4.18.5
This register contains the high order word of the stopping SL11R memory address. This is the last DMA address in memory. DMA
will stop when this address is reached.
Note:
A21 = 1 the stopping memory address will be in the DRAM. The A21 bit must be matched on the High DMA Start Address register.
5.0
The SL11R has four modes. They are General Purpose IO mode, Fast EPP mode, 8-bit DMA mode, and 8/16 DMA, Mailbox
Protocol ports mode. These modes are shared and can be configured under software control.
Note: The UART and 2-wire serial interface IO pins are fixed in all SL11R Interface modes.
5.1
In GPIO mode, the SL11R has up to 32 general-purpose I/O signals available. However, there are 4 pins used by the UART and
the 2-wire serial interface that cannot be used as the GPIO pins. A typical application for this GPIO is Parallel Port to USB. The
SL11R executes at 48MHz -- fast enough to generate any Parallel Port timing. The SL11R also includes a special mode for EPP
timing designed for special devices that have no delay in the EPP mode. Other available General Purpose I/O pins can be
programmed for peripheral control and/or status, etc.
When the SL11R interface is in GPIO mode, a number of GPIO pins are used to support the parallel interface. The remaining
pins can be used for GPIO or if desired, some can be configured for special functions.
The following registers are used for all pins configured as GPIO. The outputs are enabled in the I/0 Control registers. Note that
the output Data can be read back via the Output Data Register even if the outputs are not enabled.
Note: The Fast DMA and PWM Interface will not be supported in this mode.
Document #: 38-08006 Rev. **
D5-D0
D15-0
D5-D0
High DMA Start Address Register (0xC02E: R/W)
Low DMA Stop Address Register (0xC030: R/W)
High DMA Stop Address Register (0xC032: R/W)
General Purpose IO mode (GPIO)
SL11R Interface Modes
D15
A15
D14
A14
A21-A16
A15-A0
A21-A16
D13
A13
D12
A12
D7
D7
0
0
High Address bits for DMA start address
Low 16 Bits of the DMA stop address
High Address bits for DMA stop address.
D11
A11
D6
D6
0
0
A21
D10
A21
A10
D5
D5
A20
A20
D9
A9
D4
D4
D8
A8
A19
A19
D3
D3
D7
A7
A18
A18
D2
D2
D6
A6
A17
A17
D1
D1
D5
A5
A16
A16
D0
D0
D4
A4
D3
A3
D2
A2
D1
A1
D0
A0
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SL11R