MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 109

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MC68340AG25E

Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68340AG25E

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
this compare is low-pass filtered and used to control the VCO. The comparator also
detects when the external crystal or oscillator stops running to initiate the limp mode for
the system clock.
The PLL requires an external low-leakage filter capacitor, typically in the range from 0.01
to 0.1 F, connected between the XFC and V
provide 50-M insulation but should not be electrolytic. Smaller values of the external filter
capacitor provide a faster response time for the PLL, and larger values provide greater
frequency stability. For external clock mode without PLL, the XFC pin can be left open.
4.2.3.2 FREQUENCY DIVIDER. The frequency divider circuits divide the VCO frequency
down to the reference frequency for the phase comparator. The frequency divider consists
of 1) a 2-bit prescaler controlled by the W-bit in the SYNCR and 2) a 6-bit modulo
downcounter controlled by the Y-bits in the SYNCR.
Several factors are important to the design of the system clock. The resulting system clock
frequency must be within the limits specified for the device. The frequency of the system
clock is given by the following equation:
The maximum VCO frequency limit must also be observed. The VCO frequency is given
by the following equation:
Since clearing the X-bit causes the VCO to run at twice the system frequency, the VCO
upper frequency limit must be considered when programming the SYNCR. Both the
system clock and VCO frequency limits are given in Section 11 Electrical
Characteristics. Table 4-2 lists some frequencies available from various combinations of
SYNCR bits with a reference frequency of 32.768-KHz.
4-12
F
Freescale Semiconductor, Inc.
SYSTEM
For More Information On This Product,
F
MC68340 USER’S MANUAL
= F
VCO
Go to: www.freescale.com
CRYSTAL
= F
SYSTEM
[2
CCSYN
(2+2W+X)
[2
(2–X)
pins. The XFC capacitor should
]
]
(Y+1)
MOTOROLA

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