MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 19

• Manufacturer Part Number: MC68340AG25E
• Description: IC MPU 32BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG25E

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

11/2/95
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Figure
MC68340 Crystal Oscillator.................................................................................. 4-10
Clock Block Diagram for External Oscillator Operation................................... 4-11
Full Interrupt Request Multiplexer........................................................................ 4-16
SIM40 Programming Model.................................................................................. 4-19
CPU32 Block Diagram........................................................................................... 5-3
Loop Mode Instruction Sequence ....................................................................... 5-3
User Programming Model..................................................................................... 5-9
Supervisor Programming Model Supplement .................................................. 5-9
Status Register........................................................................................................ 5-10
Instruction Word General Format......................................................................... 5-12
Table Example 1..................................................................................................... 5-30
Table Example 2..................................................................................................... 5-31
Table Example 3..................................................................................................... 5-33
Exception Stack Frame.......................................................................................... 5-42
Reset Operation Flowchart.................................................................................... 5-45
Format $0—Four-Word Stack Frame.................................................................. 5-60
Format $2—Six-Word Stack Frame .................................................................... 5-60
Internal Transfer Count Register.......................................................................... 5-61
Format $C—BERR Stack for Prefetches and Operands.................................. 5-62
Format $C—BERR Stack on MOVEM Operand................................................ 5-62
Format $C—Four- and Six-Word BERR Stack.................................................. 5-63
In-Circuit Emulator Configuration ........................................................................ 5-64
Bus State Analyzer Configuration ....................................................................... 5-64
BDM Block Diagram............................................................................................... 5-65
BDM Command Execution Flowchart................................................................. 5-68
Debug Serial I/O Block Diagram.......................................................................... 5-70
Serial Interface Timing Diagram.......................................................................... 5-71
BKPT Timing for Single Bus Cycle...................................................................... 5-72
BKPT Timing for Forcing BDM ............................................................................. 5-72
BKPT /DSCLK Logic Diagram .............................................................................. 5-72
Command-Sequence Diagram............................................................................ 5-75
Functional Model of Instruction Pipeline ............................................................ 5-87
Instruction Pipeline Timing Diagram................................................................... 5-88
Block Diagram of Independent Resources ........................................................ 5-90
Simultaneous Instruction Execution.................................................................... 5-91
Attributed Instruction Times................................................................................... 5-92
Example 1—Instruction Stream ........................................................................... 5-95
Example 2—Branch Taken................................................................................... 5-95
Example 2—Branch Not Taken............................................................................ 5-96
Example 3—Branch Negative Tail ...................................................................... 5-96
LIST OF ILLUSTRATIONS (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
SECTION 1: OVERVIEW
MC68340 USER'S MANUAL
Go to: www.freescale.com
Title
UM Rev.1.0
MOTOROLA
Number
P a g e