MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 57

• Manufacturer Part Number: MC68340AG25E
• Description: IC MPU 32BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG25E

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

For a read operation, the slave responds by placing data on bits 15–8 of the data bus,
asserting DSACK0 and negating DSACK1 to indicate an 8-bit port. The MC68340 then
reads the operand byte from bits 15–8 and ignores bits 7–0.
For a write operation, the MC68340 drives the single-byte operand on both bytes of the
data bus because it does not know the port size until the DSACK signals are read. The
slave device reads the byte operand from bits 15–8 and places the operand in the
specified location. The slave then asserts DSACK0 to terminate the bus cycle.
3.2.3.2 BYTE OPERAND TO 16-BIT PORT, EVEN (A0 = 0). The MC68340 drives the
address bus with the desired address and the SIZx pins to indicate a single-byte operand.
For a read operation, the slave responds by placing data on bits 15–8 of the data bus and
asserting DSACK1 to indicate a 16-bit port. The MC68340 then reads the operand byte
from bits 15–8 and ignores bits 7–0.
For a write operation, the MC68340 drives the single-byte operand on both bytes of the
data bus because it does not know the port size until the DSACK signals are read. The
slave device reads the operand from bits 15–8 of the data bus and uses the address to
place the operand in the specified location. The slave then asserts DSACK1 to terminate
the bus cycle.
3-8
BYTE OPERAND
DATA BUS
BYTE OPERAND
DATA BUS
CYCLE 1
CYCLE 1
7
D15
7
D15
Freescale Semiconductor, Inc.
OP0
OP0
OP0
OP0
For More Information On This Product,
D8
D8
0
0
D7
D7
MC68340 USER’S MANUAL
(OP0)
(OP0)
Go to: www.freescale.com
D0
D0
SIZ1
SIZ1
0
0
SIZ0
SIZ0
1
1
A0
A0
X
0
DSACK1
DSACK1
1
0
DSACK0
DSACK0
0
X
MOTOROLA