MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 260

• Manufacturer Part Number: MC68340AG25E
• Description: IC MPU 32BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG25E

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

6.4.1.2 SINGLE-ADDRESS WRITE. During the single-address destination (write) cycle,
the DMA controls the transfer of data from a device to memory. The data is written to
memory selected by the address specified in the destination address register (DAR), the
destination function codes in the FCR, and the size in the CCR. The destination (write)
DMA bus cycle has timing identical to a write bus cycle. The DMA control signals ( DACK
and DONE ) are asserted in the destination (write) cycle. See Figures 6-7 and 6-8 for
timing diagrams of single-address write for external burst and cycle steal modes.
6-10
FC3–FC0
SIZ1-SIZ0
(OUTPUT)
D15–D0
DSACKx
CLKOUT
A31–A0
NOTE:
(INPUT)
.
DREQx
DONEx
DACKx
DONEx
R/W
AS
DS
1. Timing to generate more than one DMA request.
2. DACKx and DONEx (DMA control signals) are asserted in the source (read) DMA cycle.
2. DREQx must be asserted while DACKx is asserted, and meet the setup and hold times for
Figure 6-7. Single-Address Write Timing (External Burst)
more than one DMA transfer to be recognized.
S0
CPU CYCLE
Freescale Semiconductor, Inc.
S2
For More Information On This Product,
S4
MC68340 USER’S MANUAL
Go to: www.freescale.com
S0
DMA WRITE
S2
S4
S0
DMA WRITE
S2
S4
S0
CPU CYCLE
MOTOROLA