MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 333

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MC68340AG25E

Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68340AG25E

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
7.4.1.17 MODE REGISTER 2 (MR2). MR2 controls some of the serial module
configuration. This register can be read or written at any time the serial module is enabled
(i.e., the STP bit in the MCR is cleared).
CM1–CM0—Channel Mode
These bits select a channel mode as listed in Table 7-9. See 7.3.3 Looping Modes for
more information on the individual modes.
TxRTS—Transmitter Ready-to-Send
7-38
This bit controls the negation of the RTSA or RTSB signals. The output is normally
asserted by setting OP0 or OP1 and negated by clearing OP0 or OP1 (see 7.4.1.15
Output Port Control Register (OPCR)).
1 = In applications where the transmitter is disabled after transmission is complete,
0 = Clearing this bit has no effect on the transmitter RTS .
setting this bit causes the particular OP bit to be cleared automatically one bit
time after the characters, if any, in the channel transmit shift register and the
transmitter holding register are completely transmitted, including the programmed
number of stop bits. This feature is used to automatically terminate transmission
of a message. If both the receiver and the transmitter in the same channel are
programmed for RTS control, RTS control is disabled for both since this is an
incorrect configuration.
MR2A, MR2B
Read/Write
RESET:
CM1
Freescale Semiconductor, Inc.
7
0
For More Information On This Product,
CM1
CM0
Table 7-9. CMx Control Bits
6
0
0
0
1
1
MC68340 USER’S MANUAL
TxRTS
Go to: www.freescale.com
5
0
CM0
0
1
0
1
TxCTS
4
0
Remote Loopback
Automatic Echo
Local Loopback
SB3
3
0
Normal
Mode
Supervisor/User
SB2
2
0
$720, $721
SB1
1
0
SB0
0
0
MOTOROLA

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