W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 121

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Implement the instruction by setting the instruction mode in Base+1.
ADDRESS
The functions and definitions of the 8 bytes are shown in the following table.
Write SPI instructions to Base+0. Set up the addresses and the data in Base+2 ~ Base+7.
Base+0
Base+1
Base+2
Base+3
Base+4
Base+5
Base+6
Base+7
Take erasing the SPI for example, first write the “Chip Erase” instruction to Base+0 and
1Xh
modes are listed in the table below. For Mode 1, only a one-byte instruction is generated. For
Mode 2, in addition to a one-byte instruction, a one-byte parameter, which is set up in
Base+4 in advance, is also generated.
§1
significant byte (MSB) of the address).
Functions and Definitions
Usages
The “X” of 1X stands for the parameters of the address[19:16] (A19~A16, the most
§1
Accessing SPI Devices
to Base+1 (Bit3~Bit0 of Base +1 is the parameter of address[19:16].). The instruction
BIT
7:0
7:4
3:0
7:0
7:0
7:0
7:0
7:0
7:0
FUNCTION
DATA0
DATA1
DATA2
DATA3
MODE
ADD2
ADD1
ADD0
Table 9.2 SPI Address Map
CMD
Mode execution. Please see the Table 9.3 for the
-109-
Commands or instructions of each SPI device
details of each mode.
Publication Release Date: Aug, 22, 2007
Address [19:16]
DESCRIPTION
Address [15:8]
Address [7:0]
Data byte 0
Data byte 1
Data byte 2
Data byte 3
W83627DHG
Version 1.4