W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 3

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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12/15/2005
02/22/2006
03/15/2006
05/05/2006
05/15/2006
05/19/2006
06/23/2006
DATES
VERSION
0.41
0.42
0.1
0.2
0.3
0.4
0.5
Data Sheet Revision History
VERSION
WEB
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-I-
First published version.
Add descriptions of the registers, functions,, AC/DC
timing, and top marking
Revise Table 8.1 and the timing chart of section 10.3.1
Add registers for AMDSI at LDB, CRF5h,CRF6h and
F7h(Bank1)
Swap LDB, CRF2h bit 0 and bit 1.
Modify the default values for LDA, CRFEh
Modify the descriptions of LD9, CR30h bit 0 and
CRF7h bit 4.
Remove LDA, CRE9h bit4 ~ 3
Swap LDC, CRE0h bit3~0 and CRE5h bit7~4
Add FDC, UART, Parallel Port and KBC interface
descriptions
Remove all the descriptions about AMDSI
Modify the diagrams and descriptions for Current Mode
Add two control bits for the selections of SYSFANOUT
and CPUFANOUT0 output type at CR[24h]
Remove the description of the internal pulled-up
resistor of Parallel Port
Modify the definitions of edge/level and enable/disable
debounce circuit of GP30, GP31 and GP35
Modify the descriptions of LD7, CRF7h and LD9,
CRE6h ~ CRE9h
Correct typos and grammatical mistakes
Remove the remaining descriptions about AMDSI in
datasheet ver.0.4
Add a note for Index# of FDC Interface and pin
83(GP42) of Serial Port & Infrared Port Interface in Pin
Description
Reserve the bit 7 of LD0, CRF0h
Modify the descriptions of TRAK0#, WP#, RDATA#
and DSKCHG# of FDC Interface
Modify the descriptions for strapping pins: HEFRAS,
PENROM, PENKBC and EN_GTL
Modify the DC spec.
Remove the note and renew the descriptions for
Index# of FDC Interface.
Correct the descriptions of HM Device Bank 0, CR[12h]
bit0.
Add
CPUFAOUT1 output type selection.
Add a new bit at LDC, CR[E8h] bit 1 for more PECI
two
control
Publication Release Date: Aug, 22, 2007
MAIN CONTENTS
bits
for
W83627DHG
AUXFANOUT
Version 1.4
and