W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 166
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W83627DHG
Manufacturer Part Number
W83627DHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83627DHG.pdf
(268 pages)
Specifications of W83627DHG
Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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12.3.7 TFIFO (Test FIFO Mode) Mode = 110
Data bytes may be read, written, or DMAed to or from the system to this FIFO in any direction. Data in
the tFIFO is not transmitted to the parallel port lines. However, data in the tFIFO may be displayed on
the parallel port data lines.
12.3.8 CNFGA (Configuration Register A) Mode = 111
This register is a read-only register. When it is read, 10h is returned indicating an 8-bit implementation.
12.3.9 CNFGB (Configuration Register B) Mode = 111
The bit definitions are as follows:
Bit 7: This bit is read-only. It is logical 0 during a read, which means that this chip does not support
hardware RLE compression.
Bit 6: Returns the value on the ISA IRQ line to determine possible conflicts.
Bit 5-3: Reflects the IRQ resource assigned for ECP port.
Bit 2-0: These five bits are logical 1 during a read and can be written.
CNFGB[5:3]
000
001
010
011
100
101
110
111
Reflects other IRQ resources selected by PnP register (default)
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15
IRQ5
7
6
5
4
3
1
2
-154-
1
1
0
1
IRQ RESOURCE
compress
IRQx 0
IRQx 1
IRQx 2
intrValue
Publication Release Date: Aug, 22, 2007
W83627DHG
Version 1.4