W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 70
W83627DHG
Manufacturer Part Number
W83627DHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83627DHG.pdf
(268 pages)
Specifications of W83627DHG
Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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(1)If SYSFANOUT is programmed for PWM output (Bank0 Index 04h,bit0 is 0)
Bit 7-0: The PWM duty cycle is equal to this eight-bit value, divided by 255, times 100%. FFh creates a
(2)If SYSFANOUT is programmed for DC Voltage output (Bank0 Index 04h,bit0 is 1)
Bit 7-2: SYSFANOUT voltage control. The output voltage is calculated according to this equation.
Bit 1-0: Reserved.
8.5
Register Location:
Power on Default Value:
Attribute:
Size:
The register is meaningful only when CPUFANOUT0 is programmed for PWM output.
Bit 7: CPUFANOUT0 PWM Input Clock Source Select. This bit selects the clock source for PWM
Bit 6-0: CPUFANOUT0 PWM Pre-Scale divider. The clock source for PWM output is divided by this
seven-bit value to calculate the actual PWM output frequency.
The maximum value of the divider is 127 (7Fh), and it should not be set to 0.
CPUFANOUT0 PWM Output Frequency Configuration Register - Index 02h
(Bank 0)
output.
0: clock source is 24 MHz.
duty cycle of 100%, and 00h creates a duty cycle of 0%.
1: clock source is 180 KHz.
PWM output frequency =
7
02h
04h
Read/Write
8 bits
6
5
4
3
Pre_Scale
2
OUTPUT Voltage =
Input
-58-
1
0
Clock
Divider
PWM_CLK_SEL2
PWM_SCALE2
Publication Release Date: Aug, 22, 2007
∗
256
AVCC
1
*
W83627DHG
FANOUT
64
Version 1.4