W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 93

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 1: SYSFANIN output value, only if bit 0 is set to zero.
Bit 0: SYSFANIN Input Control.
0: Pin113 acts as a FAN control signal, and the output value is set by bit 1.
8.44 Register 50h ~ 5Fh Bank Select Register - Index 4Eh (Bank 0)
Register Location:
Power on Default Value:
Attribute:
Size:
Bit 7: HBACS - High byte access.
Bit 6: Reserved. This bit should be set to zero.
Bit 5: BEEP output control for AUXFANIN1 if the monitored value exceeds the threshold value.
Bit 4: BEEP output control for CPUFANIN1 if the monitored value exceeds the threshold value.
Bit 3: Reserved. This bit should be set to zero.
Bit 2-0: Bank Select for Index Ports 0x50h~0x5Fh. The three-bit binary value corresponds to the bank
number. For example, “010” selects bank2.
8.45 Winbond Vendor ID Register - Index 4Fh (Bank 0)
Register Location:
Power on Default Value:
Attribute:
Size:
1: Pin113 (SYSFANIN) generates a logic-high signal.
0: Pin113 generates a logic-low signal. (Default)
1: Pin113 (SYSFANIN) acts as a FAN tachometer input. (Default)
1: Enable BEEP output.
0: Disable BEEP output. (Default)
1: Enable BEEP output.
0: Disable BEEP output. (Default)
1: Access Index 4Fh high-byte register. (Default)
0: Access Index 4Fh low-byte register.
7
6
4Eh
80h
Read/Write
8 bits
4Fh
<15:0> = 5CA3h
Read Only
16 bits
5
4
3
2
1
-81-
0
BANKSEL0
BANKSEL1
BANKSEL2
Reserved
EN_CPUFANIN1_BP
EN_AUXFANIN1_BP
Reserved
HBACS
Publication Release Date: Aug, 22, 2007
W83627DHG
Version 1.4