PI7C9X110BNBE Pericom Semiconductor, PI7C9X110BNBE Datasheet - Page 126

IC PCIE TO PCI REV BRG 160LFBGA

PI7C9X110BNBE

Manufacturer Part Number
PI7C9X110BNBE
Description
IC PCIE TO PCI REV BRG 160LFBGA
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X110BNBE

Applications
PCI-to-PCI Bridge
Interface
I²C
Voltage - Supply
1.8 V
Package / Case
160-LBGA
Mounting Type
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Rad Hardened
No
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Compliant

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0
7.6.15 UPSTREAM PAGE BOUNDARY IRQ 0 MASK REGISTER – OFFSET 060h
7.6.16 UPSTREAM PAGE BOUNDARY IRQ 1 MASK REGISTER – OFFSET 064h
7.6.17 RESERVED REGISTER – OFFSET 068C
7.6.18 PRIMARY CLEAR IRQ REGISTER – OFFSET 070h
7.6.19 SECONDARY CLEAR IRQ REGISTER – OFFSET 070h
Pericom Semiconductor – Confidential
BIT
31:0
BIT
31:0
BIT
15:0
BIT
31:16
FUNCTION
Upstream Page Boundary
IRQ 0 Mask
FUNCTION
Upstream Page Boundary
IRQ 1 Mask
FUNCTION
Primary Clear IRQ
FUNCTION
Secondary Clear IRQ
TYPE
TYPE
TYPE
TYPE
RWC
RWC
RWC
RWC
Page 126 of 144
DESCRIPTION
0: PI7C9X110 can initiate an interrupt request when the correspondent
request bit is set
1: PI7C9X110 cannot initiate any interrupt request even though the
correspondent request bit is set
Reset to FFFFFFFFh
DESCRIPTION
0: PI7C9X110 can initiate an interrupt request when the correspondent
request bit is set
1: PI7C9X110 cannot initiate any interrupt request even though the
correspondent request bit is set
Reset to FFFFFFFFh
DESCRIPTION
When writing “1” to this register bit, it clears the correspondent interrupt
request bit.
When reading this register, it returns the interrupt request bit status:
0: It is not the bit that causes the interrupt request on primary interface
1: It is the bit that causes the interrupt request on primary interface
Reset to 0000h
DESCRIPTION
When writing “1” to this register bit, it clears the correspondent interrupt
request bit.
When reading this register, it returns the interrupt request bit status:
0: It is not the bit that causes the interrupt request on secondary interface
1: It is the bit that causes the interrupt request on secondary interface
Reset to 0000h
April 2010, Revision 3.0
PCIe-to-PCI Reversible Bridge
PI7C9X110

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