PI7C9X110BNBE Pericom Semiconductor, PI7C9X110BNBE Datasheet - Page 35

IC PCIE TO PCI REV BRG 160LFBGA

PI7C9X110BNBE

Manufacturer Part Number
PI7C9X110BNBE
Description
IC PCIE TO PCI REV BRG 160LFBGA
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X110BNBE

Applications
PCI-to-PCI Bridge
Interface
I²C
Voltage - Supply
1.8 V
Package / Case
160-LBGA
Mounting Type
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Rad Hardened
No
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C9X110BNBE
Manufacturer:
PLX
Quantity:
1 238
Part Number:
PI7C9X110BNBE
Manufacturer:
PERICOM31
Quantity:
193
Part Number:
PI7C9X110BNBE
Manufacturer:
Pericom
Quantity:
10 000
Part Number:
PI7C9X110BNBE
Manufacturer:
PERICOM
Quantity:
20 000
Part Number:
PI7C9X110BNBE
0
7.4.5
7.4.6
7.4.7
Pericom Semiconductor – Confidential
REVISION ID REGISTER – OFFSET 08h
CLASS CODE REGISTER – OFFSET 08h
CACHE LINE SIZE REGISTER – OFFSET 0Ch
BIT
29
30
31
BIT
7:0
BIT
15:8
23:16
31:24
BIT
1:0
2
3
4
5
FUNCTION
Received Master Abort
Signaled System Error
Detected Parity Error
FUNCTION
Revision
FUNCTION
Programming Interface
Sub-Class Code
Base Class Code
FUNCTION
Reserved
Cache Line Size
Cache Line Size
Cache Line Size
Cache Line Size
TYPE
TYPE
TYPE
TYPE
RWC
RWC
RWC
RW
RW
RW
RW
RO
RO
RO
RO
RO
Page 35 of 144
DESCRIPTION
REVERSE BRIDGE –
This bit is set when PI7C9X110 detects a target abort on the primary
Reset to 0
FORWARD BRIDGE –
This bit is set when PI7C9X110 receives a completion with unsupported
request completion status on the primary
REVERSE BRIDGE –
This bit is set when PI7C9X110 detects a master abort on the primary
FORWARD BRIDGE –
This bit is set when PI7C9X110 sends an ERR_FATAL or
ERR_NON_FATAL message on the primary
REVERSE BRIDGE –
This bit is set when PI7C9X110 asserts SERR_L on the primary
Reset to 0
FORWARD BRIDGE –
This bit is set when poisoned TLP is detected on the primary
REVERSE BRIDGE –
This bit is set when address or data parity error is detected on the primary
Reset to 0
DESCRIPTION
Reset to 00000004h
DESCRIPTION
Subtractive decoding of PCI-PCI bridge not supported
Reset to 00000000
Sub-Class Code
00000100: PCI-to-PCI bridge
Reset to 00000100
Base class code
00000110: Bridge Device (transparent mode)
Reset to 00000110 (transparent mode)
DESCRIPTION
Bit [1:0] not supported
Reset to 00
1: Cache line size = 4 double words
Reset to 0
1: Cache line size = 8 double words
Reset to 0
1: Cache line size = 16 double words
Reset to 0
1: Cache line size = 32 double words
April 2010, Revision 3.0
PCIe-to-PCI Reversible Bridge
PI7C9X110

Related parts for PI7C9X110BNBE