PI7C9X110BNBE Pericom Semiconductor, PI7C9X110BNBE Datasheet - Page 98

• Manufacturer Part Number: PI7C9X110BNBE
• Description: IC PCIE TO PCI REV BRG 160LFBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X110BNBE

• Applications: PCI-to-PCI Bridge
• Interface: I²C
• Voltage - Supply: 1.8 V
• Package / Case: 160-LBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Compliant

7.5.58 UPSTREAM SPLIT TRANSACTION REGISTER – OFFSET 88h
7.5.59 DOWNSTREAM SPLIT TRANSACTION REGISTER – OFFSET 8Ch
7.5.60 POWER MANAGEMENT ID REGISTER – OFFSET 90h
Pericom Semiconductor – Confidential
BIT
20
21
31:22
BIT
15:0
31:16
BIT
15:0
31:16
BIT
7:0
FUNCTION
Split Completion Overrun
Split Request Delayed
Reserved
FUNCTION
Upstream Split Transaction
Capability
Upstream Split Transaction
Commitment Limit
FUNCTION
Downstream Split
Transaction Capability
Downstream Split
Transaction Commitment
Limit
FUNCTION
Power Management ID
TYPE
TYPE
TYPE
TYPE
RWC
RWC
RW
RW
RO
RO
RO
RO
Page 98 of 144
DESCRIPTION
When this bit is set to 1, a split completion has been terminated by
PI7C9X110 with either a retry or disconnect at the next ADB due to the
buffer full condition
Reset to 0
When this bit is set to 1, a split request is delayed because PI7C9X110 is not
able to forward the split request transaction to its primary bus due to
insufficient room within the limit specified in the split transaction
commitment limit field of the downstream split transaction control register
Reset to 0
0000000000
DESCRIPTION
Upstream Split Transaction Capability specifies the size of the buffer (in the
unit of ADQs) to store split completions for memory read. It applies to the
requesters on the secondary bus in addressing the completers on the primary
bus. The 0010h value shows that the buffer has 16 ADQs or 2K bytes
storage
Reset to 0010h
Upstream Split Transaction Commitment Limit indicates the cumulative
sequence size of the commitment limit in units of ADQs. This field can be
programmed to any value or equal to the content of the split capability field.
For example, if the limit is set to FFFFh, PI7C9X110 is allowed to forward
all split requests of any size regardless of the amount of buffer space
available. The split transaction commitment limit is set to 0010h that is the
same value as the split transaction capability.
Reset to 0010h
DESCRIPTION
Downstream Split Transaction Capability specifies the size of the buffer (in
the unit of ADQs) to store split completions for memory read. It applies to
the requesters on the primary bus in addressing the completers on the
secondary bus. The 0010h value shows that the buffer has 16 ADQs or 2K
bytes storage
Reset to 0010h
Downstream Split Transaction Commitment Limit indicates the cumulative
sequence size of the commitment limit in units of ADQs. This field can be
programmed to any value or equal to the content of the split capability field.
For example, if the limit is set to FFFFh, PI7C9X110 is allowed to forward
all split requests of any size regardless of the amount of buffer space
available. The split transaction commitment limit is set to 0010h that is the
same value as the split transaction capability.
Reset to 0010h
DESCRIPTION
Power Management ID Register
Reset to 01h
April 2010, Revision 3.0
PCIe-to-PCI Reversible Bridge
PI7C9X110