AM79C973BKC AMD (ADVANCED MICRO DEVICES), AM79C973BKC Datasheet - Page 118

• Manufacturer Part Number: AM79C973BKC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC

• Lead Free Status / Rohs Status: Not Compliant

4-2
1
0
PCI Memory Mapped I/O Base Address Register
Offset 14h
The PCI Memory Mapped I/O Base Address register is
a 32-bit register that determines the location of the
Am79C973/Am79C975 I/O resources in all of memory
space. It is located at offset 14h in the PCI Configuration
Space.
Bit
31-5
118
IOSIZE
RES
IOSPACE
Name
MEMBASE Memory mapped I/O base ad-
will drive DEVSEL indicating it
will respond to the access.
IOBASE is read and written by
the host. IOBASE is cleared by
H_RESET and is not affected by
S_RESET or by setting the STOP
bit.
zeros; write operations have no
effect.
IOSIZE indicates the size of the
I/O
Am79C975 controller requires.
When the host writes a value of
FFFF FFFFh to the I/O Base Ad-
dress register, it will read back a
value of 0 in bits 4-2. That indi-
cates an Am79C973/Am79C975
I/O space requirement of 32
bytes.
write operations have no effect.
write operations have no effect.
Indicating that this base address
register describes an I/O base
address.
dress most significant 27 bits.
These bits are written by the host
to specify the location of the
Am79C973/Am79C975 I/O re-
sources in all of memory space.
MEMBASE must be written with a
valid
Am79C973/Am79C975 controller
slave memory mapped I/O mode
is turned on by setting the ME-
MEN bit (PCI Command register,
bit 1).
I/O size requirements. Read as
Reserved location. Read as zero;
I/O space indicator. Read as one;
Description
space
address
the
before
Am79C973/
P R E L I M I N A R Y
Am79C973/Am79C975
the
4
3
2-1
0
MEMSPACE Memory space indicator. Read
PREFETCH Prefetchable. Read as zero; write
MEMSIZE
TYPE
When
Am79C975 controller is enabled
for memory mapped
(MEMEN is set), it monitors the
PCI bus for a valid memory com-
mand. If the value on AD[31:5]
during the address phase of the
cycles matches the value of
MEMBASE,
Am79C975 controller will drive
DEVSEL indicating it will respond
to the access.
MEMBASE is read and written by
the host. MEMBASE is cleared
by H_RESET and is not affected
by S_RESET or by setting the
STOP bit.
MEMSIZE indicates the size of
the
Am79C973/Am79C975 controller
requires. When the host writes a
value of FFFF FFFFh to the
Memory Mapped I/O Base Ad-
dress register, it will read back a
value of 0 in bit 4. That indicates
a Am79C973/Am79C975 memo-
ry space requirement of 32 bytes.
quirements. Read as zeros; write
operations have no effect.
operations have no effect. Indi-
cates that memory space con-
trolled by this base address
register is not prefetchable. Data
in the memory mapped I/O space
cannot be prefetched. Because
one of the I/O resources in this
address space is a Reset regis-
ter, the order of the read access-
es is important.
Memory type indicator. Read as
zeros; write operations have no
effect. Indicates that this base ad-
dress register is 32 bits wide and
mapping can be done anywhere
in the 32-bit memory space.
as zero; write operations have no
effect. Indicates that this base ad-
dress register describes a memo-
ry base address.
Memory mapped I/O size re-
memory
the
the
space
Am79C973/
Am79C973/
I/O mode
the