AM79C973BKC AMD (ADVANCED MICRO DEVICES), AM79C973BKC Datasheet - Page 274

• Manufacturer Part Number: AM79C973BKC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC

• Lead Free Status / Rohs Status: Not Compliant

MII management registers
As specified in the IEEE standard, the basic register
set consists of the Control Register (Register 0) and
the Status Register (Register 1). The extended register
set consists of Registers 2 to 31 (decimal). All PHYs
that provide an MII shall incorporate the basic register
set. Both sets of registers are accessible through the
MII Management Interface.
Table C-70 lists the most interesting registers.
Control Register (Register 0)
Table C-71 shows the MII Management Control Regis-
ter (Register 0).
Note:
1. R/W = Read/Write, SC = Self Clearing, RO = Read only.
274
Bits
6-0
15
14
13
12
11
10
9
8
7
Restart Auto-Negotiation
Auto-Negotiation Enable
Speed Selection
Duplex Mode
Collision Test
Power Down
Soft Reset
Loopback
Reserved
Isolate
Name
Table 71. MII Management Control Register (Register 0)
When write:
1 = PHY software reset
0 = normal operation.
When read:
1 = reset in process
0 = reset done.
1 = enables Loopback mode
0 = disables Loopback mode
1 = 100 Mbps
0 = 10 Mbps
1 = enable Auto-Negotiation
0 = disable Auto-Negotiation
1 = power down, 0 = normal operation
1 = electrically isolate PHY from MII
0 = normal operation
1 = restart Auto-Negotiation
0 = normal operation
1 = full duplex
0 = half duplex
1 = enable COL signal test
0 = disable COL signal test
Write as 0, ignore on read
P R E L I M I N A R Y
Am79C973/Am79C975
Description
Register
Address
2-3
Table 70. MII Management Register Set
0
1
4
5
Auto-Negotiation Link
Auto-Negotiation
Register Name
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Partner Ability
PHY Identifier
MII Control
MII Status
Read/Write
(Note 1)
R/W, SC
R/W, SC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Extended
RO
Basic/
B
B
E
E
E