B69000 Asiliant Technologies, B69000 Datasheet - Page 218

• Manufacturer Part Number: B69000
• Manufacturer: Asiliant Technologies

Specifications of B69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

FR03
read/write at I/O address 3D1h with index at I/O address 3D0h set to 03h
7-5
4
3-2
1-0
&+,36
7
Reserved (000)
FP Clock Synthesizer Select
0: Use Video Clock Synthesizer to generate FP dot clock (default).
1: Use Memory Clock Synthesizer to generate FP dot clock.
This bit selects the graphics/video clock synthesizer to generate the FP dot clock in FP mode (FR01
bit 1 is set to 1). Note that CRT display engine always uses dot clock from the graphics/video clock
synthesizer.
FP Clock Select Bits (reset state: 00)
Select graphics/video clock synthesizer frequency when not in CRT mode (FR01 bit 0 is set to 0).
In CRT mode, the graphics/video clock synthesizer frequency is selected by MSR bits 3-2. See
description of MSR bits 3-2.
Reserved (R/W)
69000 Databook
FP Dot Clock Source Register
Reserved
(000)
6
5
Bits
1 0
0 0
0 1
1 x
Subject to Change Without Notice
Synthesizer
Flat Panel Registers
Select clock 0
Select clock 1
Select clock 2
(0)
4
CRT/FP Control
FP Clock Synth Select
3
(00)
2
Revision 1.3 8/31/98
Reserved (R/W)
1
(00)
0
15-3