ATmega169P Automotive Atmel Corporation, ATmega169P Automotive Datasheet - Page 84

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ATmega169P Automotive

Manufacturer Part Number
ATmega169P Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega169P Automotive

Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
84
ATmega169P Automotive
• TDO, ADC6 – Port F, Bit 6
ADC6, Analog to Digital Converter, Channel 6
TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Register. When
the JTAG interface is enabled, this pin can not be used as an I/O pin. In TAP states that shift out
data, the TDO pin drives actively. In other states the pin is pulled high.
• TMS, ADC5 – Port F, Bit 5
ADC5, Analog to Digital Converter, Channel 5
TMS, JTAG Test mode Select: This pin is used for navigating through the TAP-controller state
machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.
• TCK, ADC4 – Port F, Bit 4
ADC4, Analog to Digital Converter, Channel 4
TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is
enabled, this pin can not be used as an I/O pin.
• ADC3 - ADC0 – Port F, Bit 3:0
Analog to Digital Converter, Channel 3-0.
Table 12-19. Overriding Signals for Alternate Functions in PF7:PF4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
1
PF7/ADC7/TDI
JTAGEN
JTAGEN
0
0
0
JTAGEN
0
TDI
ADC7 INPUT
PF6/ADC6/TDO
JTAGEN
1
JTAGEN
SHIFT_IR + SHIFT_DR
JTAGEN
TDO
JTAGEN
0
ADC6 INPUT
.
.
.
PF5/ADC5/TMS
JTAGEN
1
JTAGEN
0
0
0
JTAGEN
0
TMS
ADC5 INPUT
PF4/ADC4/TCK
JTAGEN
1
JTAGEN
0
0
0
JTAGEN
1
TCK
ADC4 INPUT
7735B–AVR–12/07

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