ATmega169P Automotive Atmel Corporation, ATmega169P Automotive Datasheet - Page 88

• Manufacturer Part Number: ATmega169P Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega169P Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.4
12.4.1
12.4.2
12.4.3
12.4.4
12.4.5
12.4.6
12.4.7
88
Register Description for I/O-Ports
ATmega169P Automotive
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
PINA – Port A Input Pins Address
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port B Input Pins Address
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 66
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x02 (0x22)
Read/Write
Initial Value
Bit
0x01 (0x21)
Read/Write
Initial Value
Bit
0x00 (0x20)
Read/Write
Initial Value
Bit
0x05 (0x25)
Read/Write
Initial Value
Bit
0x04 (0x24)
Read/Write
Initial Value
Bit
0x03 (0x23)
Read/Write
Initial Value
PORTA7
PORTB7
PINA7
PINB7
DDA7
DDB7
JTD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
7
0
7
0
7
0
7
7
0
7
0
7
PORTB6
PORTA6
PINA6
PINB6
DDA6
DDB6
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
6
0
6
0
6
0
6
6
0
6
0
6
-
for more details about this feature.
PORTA5
PORTB5
PINA5
PINB5
DDA5
DDB5
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
5
0
5
0
5
5
0
5
0
5
R
5
0
-
PORTA4
PORTB4
PINA4
PINB4
DDA4
DDB4
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
4
0
4
0
4
4
0
4
0
4
PUD
R/W
4
0
PORTB3
PORTA3
PINA3
PINB3
DDA3
DDB3
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
3
0
3
0
3
3
0
3
0
3
R
3
–
0
PORTA2
PORTB2
PINA2
PINB2
DDA2
DDB2
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
2
0
2
0
2
2
0
2
0
2
R
2
–
0
PORTB1
PORTA1
PINA1
PINB1
DDA1
DDB1
IVSEL
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R/W
1
0
1
0
1
1
0
1
0
1
1
0
PORTA0
PORTB0
PINA0
PINB0
DDA0
DDB0
IVCE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
0
0
0
0
0
0
0
0
0
0
0
0
7735B–AVR–12/07
MCUCR
PORTA
PORTB
DDRA
DDRB
PINA
PINB
”Con-