ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 388

• Manufacturer Part Number: ATmega64
• Manufacturer: Atmel Corporation

Specifications of ATmega64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2490Q–AVR–06/10
Timer/Counter3, Timer/Counter2 and Timer/Counter1 Prescalers 144
8-bit Timer/Counter2 with PWM 146
Output Compare Modulator (OCM1C2) 161
SPI – Serial Peripheral Interface 163
USART 171
TWI – Two-wire Serial Interface 198
Analog Comparator 227
16-bit Timer/Counter Register Description 132
Overview 146
Timer/Counter Clock Sources 147
Counter Unit 148
Output Compare Unit 148
Compare Match Output Unit 150
Modes of Operation 151
Timer/Counter Timing Diagrams 155
8-bit Timer/Counter Register Description 157
Overview 161
Description 161
SS Pin Functionality 167
Data Modes 170
Overview 171
Clock Generation 172
Frame Formats 175
USART Initialization 176
Data Transmission – The USART Transmitter 178
Data Reception – The USART Receiver 181
Asynchronous Data Reception 184
Multi-processor Communication Mode 187
USART Register Description 188
Examples of Baud Rate Setting 193
Features 198
Two-wire Serial Interface Bus Definition 198
Data Transfer and Frame Format 199
Multi-master Bus Systems, Arbitration and Synchronization 202
Overview of the TWI Module 204
TWI Register Description 206
Using the TWI 209
Transmission Modes 212
Multi-master Systems and Arbitration 225
ATmega64(L)
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