ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 76
ATmega64
Manufacturer Part Number
ATmega64
Description
Manufacturer
Atmel Corporation
Specifications of ATmega64
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA64
Manufacturer:
ATMEL
Quantity:
9 500
Company:
Part Number:
ATmega64-16AU
Manufacturer:
ATM
Quantity:
5 400
Company:
Part Number:
ATmega64-16AU
Manufacturer:
ATMEL
Quantity:
9 500
Company:
Part Number:
ATmega64-16AU
Manufacturer:
Atmel
Quantity:
3 589
Part Number:
ATmega64-16AU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
ATmega64-16MI
Manufacturer:
ATMEL
Quantity:
260
Part Number:
ATmega640-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
2490Q–AVR–06/10
Table 31. Overriding Signals for Alternate Functions in PB7..PB4
Note:
Table 32. Overriding Signals for Alternate Functions in PB3..PB0
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. See
PB3/MISO
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPE • MSTR
SPI SLAVE OUTPUT
0
0
SPI MSTR INPUT
–
PB7/OC2/OC1C
0
0
0
0
OC2/OC1C ENABLE
OC2/OC1C
0
0
–
–
ATmega103 compatibility mode.
“Output Compare Modulator (OCM1C2)” on page 161
(1)
(1)
PB2/MOSI
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
SPE • MSTR
SPI MSTR OUTPUT
0
0
SPI SLAVE INPUT
–
PB6/OC1B
0
0
0
0
OC1B ENABLE
OC1B
0
0
–
–
PB5/OC1A
0
0
0
0
OC1A ENABLE
OC1A
0
0
–
–
PB1/SCK
SPE • MSTR
PORTB1 • PUD
SPE • MSTR
0
SPE • MSTR
SCK OUTPUT
0
0
SCK INPUT
–
for details. OC1C does not exist in
ATmega64(L)
PB0/SS
SPE • MSTR
PORTB0 • PUD
SPE • MSTR
0
0
0
0
0
SPI SS
–
PB4/OC0
0
0
0
0
OC0 ENABLE
OC0B
0
0
–
–
76