ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 225
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ATUC64L4U
Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.ATUC128L4U.pdf
(960 pages)
4.ATUC128L4U.pdf
(92 pages)
Specifications of ATUC64L4U
Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATUC64L4U-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATUC64L4U-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATUC64L4U-U
Manufacturer:
ATMEL
Quantity:
20
Part Number:
ATUC64L4U-ZUT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- ATUC128L4U PDF datasheet #3
- ATUC128L4U PDF datasheet #4
- Current page: 225 of 960
- Download datasheet (15Mb)
13.7.5
Name:
Access Type:
Offset:
Reset Value:
• MASK: Clock Mask
Table 13-9.
32142A–12/2011
Bit
10
11
0
1
2
3
4
5
6
7
8
9
31
23
15
7
If bit n is cleared, the clock for module n is stopped. If bit n is set, the clock for module n is enabled according to the current
power mode. The number of implemented bits in each mask register, as well as which module clock is controlled by each bit, is
shown in
Clock Mask
Maskable Module Clocks in ATUC64/128/256L3/4U.
Table
CPUMASK
OCD
30
22
14
6
-
-
-
-
-
-
-
-
-
-
-
CPUMASK/HSBMASK/PBAMASK/PBBMASK
Read/Write
0x020-0x02C
-
13-9.
29
21
13
5
Peripheral Event System
FLASHCDW
PBB bridge
PBA bridge
HSBMASK
PDCA
USBC
SAU
-
-
-
-
-
28
20
12
4
MASK[31:24]
MASK[23:16]
MASK[15:8]
MASK[7:0]
27
19
11
3
PBAMASK
USART0
USART1
USART2
FREQM
PDCA
GPIO
INTC
SCIF
WDT
AST
EIC
PM
ATUC64/128/256L3/4U
26
18
10
2
25
17
9
1
FLASHCDW
PBBMASK
HMATRIX
USBC
SAU
-
-
-
-
-
-
-
-
24
16
8
0
225
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