ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 565

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ATUC64L4U

Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC64L4U

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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23.8.2
23.8.2.1
32142A–12/2011
Operation
Bus Timing
Figure 23-4. Transfer Format
The TWIS has two modes of operation:
A master is a device which starts and stops a transfer and generates the TWCK clock. A slave is
assigned an address and responds to requests from the master. These modes are described in
the following chapters.
Figure 23-5. Typical Application Block Diagram
The Timing Register (TR) is used to control the timing of bus signals driven by the TWIS. TR
describes bus timings as a function of cycles of the prescaled CLK_TWIS. The clock prescaling
can be selected through TR.EXP.
TR has the following fields:
TLOWS: Prescaled clock cycles used to time SMBUS timeout T
• Slave transmitter mode
• Slave receiver mode
Rp: Pull up value as given by the I²C Standard
Host with
Interface
TWI
TWD
TWCK
TWD
TWCK
Start
Serial EEPROM
Atmel TWI
Slave 1
Address
R/W
f
Ack
PRESCALED
I²C RTC
Slave 2
Data
=
f
------------------------ -
2
CLK_TWIS
EXP
Controller
I²C LCD
Slave 3
ATUC64/128/256L3/4U
+
Ack
1
LOW:SEXT
Data
I²C Temp.
Sensor
Slave 4
.
Rp
Ack
Stop
Rp
VDD
565

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