ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 255

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ATUC64L4U

Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC64L4U

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14.5.6
32142A–12/2011
Bandgap
The CTRL, HYST, and LEVEL fields in the BOD Control Register are loaded factory defined cal-
ibration values from flash fuses after a reset. If the Flash Calibration Done bit in the BOD Control
Register (BOD.FCD) is zero, the flash calibration will be redone after any reset, and the
BOD.FCD bit will be set before program execution starts in the CPU. If BOD.FCD is one, the
flash calibration is redone after any reset except for a BOD reset. The BOD.FCD bit is cleared
after a reset, except for a BOD reset. BOD.FCD is set when these fields have been updated after
a flash calibration. It is possible to override the values in the BOD.CTRL, BOD.HYST, and
BOD.LEVEL fields after reset by writing to the BOD Control Register. Please refer to the Fuse
Settings chapter for more details about BOD fuses and how to program the fuses.
Figure 14-6. BOD Block Diagram
Rev: 1.2.0.0
The flash memory, the BOD, and the Temperature Sensor need a stable voltage reference to
operate. This reference voltage is provided by an internal Bandgap voltage reference. This refer-
ence is automatically turned on at start-up and turned off during some sleep modes to save
power. The Bandgap reference is powered by the internal regulator supply voltage and will not
be powered during Shutdown sleep mode. Please refer to the Power Manager chapter for
details.
POR18
POWER MANAGER(PM)
VDDCORE
ATUC64/128/256L3/4U
SCIF
BOD
INTC
255

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