ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 329
ATUC64L4U
Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.ATUC128L4U.pdf
(960 pages)
4.ATUC128L4U.pdf
(92 pages)
Specifications of ATUC64L4U
Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATUC64L4U-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATUC64L4U-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATUC64L4U-U
Manufacturer:
ATMEL
Quantity:
20
Part Number:
ATUC64L4U-ZUT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- ATUC128L4U PDF datasheet #3
- ATUC128L4U PDF datasheet #4
- Current page: 329 of 960
- Download datasheet (15Mb)
15.5.8
32142A–12/2011
Synchronization
If ADD is ‘1’, the prescaler frequency is increased:
Note that for these formulas to be within an error of 0.01%, it is recommended that the prescaler
bit that is used as the clock for the counter (selected by CR.PSEL) or to trigger the periodic inter-
rupt (selected by PIRn.INSEL) be bit 6 or higher.
As the prescaler and counter operate asynchronously from the user interface, the AST needs a
few clock cycles to synchronize the values written to the CR, CV, SCR, WER, EVE, EVD, PIRn,
ARn, and DTR registers. The Busy bit in the Status Register (SR.BUSY) indicates that the syn-
chronization is ongoing. During this time, writes to these registers will be discarded and reading
will return a zero value.
Note that synchronization takes place also if the prescaler is clocked from CLK_AST.
f
TUNED
=
f
0
⎛
⎜
⎜
⎜
⎝
1
+
------------------------------------------------------------------------------- -
roundup
ATUC64/128/256L3/4U
⎛
⎝
------------------- -
VALUE
256
1
⎞
⎠
2
EXP
–
1
⎞
⎟
⎟
⎟
⎠
329
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