M55800A Atmel Corporation, M55800A Datasheet - Page 248

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M55800A

Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M55800A

Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 27-2.
Note:
Figure 27-3.
Note:
248
MCKI
NWAIT
NCS
MCKI
NWAIT
NRD
1. These numbers refer to the standard access cycles.
1. These numbers refer to the standard access cycles.
AT91M5880A
Number of Standard Wait States is Two
Number of Standard Wait States is One
1 (1)
1
(1)
Standard Access Length with Two Wait States
If the first two conditions are not met during a 32-bit read access, the first 16-bit data is read at
the end of the standard 16-bit read access. In the following example, the number of standard
waits is one. NWAIT assertions do affect both NRD pulse lengths, but first data sampling is not
delayed. The second data sampling is correct.
32-bit Access = Two 16-bit Accesses
Each Access Length = One Wait State + Assertion for One More Cycle
EBI
5
2 (1)
First Data Sampling
EBI
(Erroneous)
5
2
(1)
2 (1)
1 (1)
2 (1)
2 (1)
3
1745F–ATARM–06-Sep-07
(1)
Second Data
Sampling
(Correct)

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