M55800A Atmel Corporation, M55800A Datasheet - Page 32

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

11.7
Write Data Hold Time
During write cycles in both protocols, output data becomes valid after the falling edge of the
NWE signal and remains valid after the rising edge of NWE, as illustrated in the figure below.
The external NWE waveform (on the NWE pin) is used to control the output data timing to guar-
antee this operation.
It is therefore necessary to avoid excessive loading of the NWE pins, which could delay the write
signal too long and cause a contention with a subsequent read cycle in standard protocol.
Figure 11-10. Data Hold Time
MCK
ADDR
NWE
Data output
In early read protocol the data can remain valid longer than in standard read protocol due to the
additional wait cycle which follows a write access.
AT91M5880A
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1745F–ATARM–06-Sep-07