M55800A Atmel Corporation, M55800A Datasheet - Page 55

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

12.2
12.2.1
12.2.2
1745F–ATARM–06-Sep-07
Slow Clock Generator
Backup Reset Controller
Slow Clock
The AT91M55800A has a very low power 32 kHz oscillator powered by the backup battery volt-
age supplied on the VDDBU pins. The XIN32 and XOUT32 pins must be connected to a 32768
Hz crystal. The oscillator has been especially designed to connect to a 6 pF typical load capaci-
tance crystal and does not require any external capacitor, as it integrates the XIN32 and
XOUT32 capacitors to ground. For a higher typical load capacitance, two external capacitances
must be wired as shown in
Figure 12-3. Higher Typical Load Capacitance
The backup reset controller initializes the logic supplied by the backup battery power. A simple
RC circuit connected to the NRSTBU pin provides a power-on reset signal to the RTC and the
shutdown logic. When the reset signal increases and as the startup time of the 32 kHz oscillator
is around 300 ms, the AT91M55800A maintains the internal backup reset signal for 32768 oscil-
lator clock cycles in order to guarantee the backup power supplied logic does not operate before
the oscillator output is stabilized.
Alternatively, a reset supervisor can be connected to the NRSTBU pin in place of the RC.
The Slow Clock is the only clock considered permanent in an AT91M55800A-based system and
is essential in the operations of the APMC (Advanced Power Management Controller). In any
use-case, a 32768 Hz crystal must be connected to the XIN32 and XOUT32 pins in order to
ensure that the Slow Clock is present.
C
Figure
L1
XIN32
12-3:
C
L2
XOUT32
GNDPLL
AT91M5880A
55