M55800A Atmel Corporation, M55800A Datasheet - Page 34

no-image

M55800A

Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M55800A

Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
11.8.3
34
AT91M5880A
External Wait
Data float wait states do not delay internal memory accesses. Hence, a single access to an
external memory with long t
memory.
The EBI keeps track of the programmed external data float time during internal accesses, to
ensure that the external memory system is not accessed while it is still busy.
Internal memory accesses and consecutive accesses to the same external memory do not have
added Data Float wait states.
Figure 11-12. Data Float Output Time
Notes:
The NWAIT input can be used to add wait states at any time. NWAIT is active low and is
detected on the rising edge of the clock.
If NWAIT is low at the rising edge of the clock, the EBI adds a wait state and changes neither the
output signals nor its internal counters and state. When NWAIT is de-asserted, the EBI finishes
the access sequence.
The NWAIT signal must meet setup and hold requirements on the rising edge of the clock.
1. Early Read Protocol
2. Standard Read Protocol
D0-D15
ADDR
NCS
MCK
NRD
DF
will not slow down the execution of a program from internal
(1)
(2)
t
DF
1745F–ATARM–06-Sep-07

Related parts for M55800A