SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 125

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

20.4.5
20.5
Table 20-1.
Note:
6289D–ATARM–3-Oct-11
Offset
0xFC
0x0C
0x1C
0x2C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
Real-time Clock (RTC) User Interface
1. Values in the Version Register vary with the version of the IP block implementation.
Updating Time/Calendar
Register Mapping
Control Register
Mode Register
Time Register
Calendar Register
Time Alarm Register
Calendar Alarm Register
Status Register
Status Clear Command Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Valid Entry Register
Version Register
Note:
To update any of the time/calendar fields, the user must first stop the RTC by setting the corre-
sponding field in the Control Register. Bit UPDTIM must be set to update time fields (hour,
minute, second) and bit UPDCAL must be set to update calendar fields (century, year, month,
date, day).
Then the user must poll or wait for the interrupt (if enabled) of bit ACKUPD in the Status Regis-
ter. Once the bit reads 1, the user can write to the appropriate register.
Once the update is finished, the user must reset (0) UPDTIM and/or UPDCAL in the Control
Register.
When programming the calendar fields, the time fields remain enabled. This avoids a time slip in
case the user stays in the calendar update phase for several tens of seconds or more. In suc-
cessive update operations, the user must wait at least one second after resetting the
UPDTIM/UPDCAL bit in the RTC_CR (Control Register) before setting these bits again. This is
done by waiting for the SEC flag in the Status Register before setting UPDTIM/UPDCAL bit.
After resetting UPDTIM/UPDCAL, the SEC flag must also be cleared.
5. Day (check range 1 - 7)
6. Hour (BCD checks: in 24-hour mode, check range 00 - 23 and check that AM/PM flag is
7. Minute (check BCD and range 00 - 59)
8. Second (check BCD and range 00 - 59)
not set if RTC is set in 24-hour mode; in 12-hour mode check range 01 - 12)
Register
If the 12-hour mode is selected by means of the RTC_MODE register, a 12-hour value can be pro-
grammed and the returned value on RTC_TIME will be the corresponding 24-hour value. The
entry control checks the value of the AM/PM indicator (bit 22 of RTC_TIME register) to determine
the range to be checked.
(1)
Register Name
RTC-VERSION
RTC_CALALR
RTC_TIMALR
RTC_SCCR
RTC_CALR
RTC_TIMR
RTC_VER
RTC_IMR
RTC_IER
RTC_IDR
RTC_MR
RTC_CR
RTC_SR
AT91SAM9R64/RL64
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Write-only
Write-only
Write-only
Read-only
Read-only
Read-only
0x01819819
0x01010000
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x-
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