SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 281

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SAM9RL64

Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9RL64

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
27.8.11
Name:
Access:
• CSS: Master Clock Selection
• PRES: Processor Clock Prescaler
• MDIV: Master Clock Division
6289D–ATARM–3-Oct-11
31
23
15
7
0
0
1
1
PMC Master Clock Register
0
0
0
0
1
1
1
1
PMC_MCKR
Read-write
MDIV
0
0
1
1
30
22
14
6
0
1
0
1
29
21
13
5
CSS
Master Clock Division
Master Clock is Processor Clock.
Master Clock is Processor Clock divided by 2.
Master Clock is Processor Clock divided by 4.
Reserved.
PRES
0
0
1
1
0
0
1
1
28
20
12
4
0
1
0
1
PRES
27
19
11
3
0
1
0
1
0
1
0
1
AT91SAM9R64/RL64
Clock Source Selection
Slow Clock is selected
Main Clock is selected
PLL Clock is selected.
Reserved
26
18
10
2
Processor Clock
Selected clock
Selected clock divided by 2
Selected clock divided by 4
Selected clock divided by 8
Selected clock divided by 16
Selected clock divided by 32
Selected clock divided by 64
Reserved
25
17
9
1
MDIV
CSS
24
16
8
0
281

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