SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 679

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

39.11.1
Name: DMABADDR1
Access: Read/Write
Reset value: 0x00000000
• BADDR-U
Base Address for the upper panel in dual scan mode. Base Address for the complete frame in single scan mode.
If a dual scan configuration is selected in LCDCON2 register or bit DMA2DEN in register DMACON is set, the bit
DMAUPDT in that same register must be written after writing any new value to this field in order to make the DMA controller
use this new value.
39.11.2
Name: DMABADDR2
Access: Read/Write
Reset value: 0x00000000
• BADDR-L
Base Address for the lower panel in dual scan mode only.
If a dual scan configuration is selected in LCDCON2 register or bit DMA2DEN in register DMACON is set, the bit
DMAUPDT in that same register must be written after writing any new value to this field in order to make the DMA controller
use this new value.
6289D–ATARM–3-Oct-11
31
23
15
31
23
15
7
7
DMA Base Address Register 1
DMA Base Address Register 2
30
22
14
30
22
14
6
6
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
BADDR-U
BADDR-U
BADDR-U
BADDR-U
BADDR-L
BADDR-L
BADDR-L
BADDR-L
27
19
11
27
19
11
3
3
AT91SAM9R64/RL64
26
18
10
26
18
10
2
2
25
17
25
17
9
1
9
1
24
16
24
16
8
0
8
0
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