SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 736

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Table 41-2.
41.4.3
Table 41-3.
Notes:
41.4.4
736
Transfer
Control
Isochronous
Interrupt
Bulk
CONTROL
(bidirectional)
IN
(device toward host)
OUT
(host toward device)
1. Control transfer must use endpoints with one bank and can be aborted using a stall handshake.
2. Isochronous transfers must use endpoints configured with two or three banks.
AT91SAM9R64/RL64
USB Transfer Event Definitions
USB V2.0 High Speed BUS Transactions
USB Communication Flow
USB Transfer Events
Control Transfers
Bulk IN Transfer
Interrupt IN Transfer
Isochronous IN Transfer
Bulk OUT Transfer
Interrupt OUT Transfer
Isochronous OUT Transfer
A transfer is composed of one or several transactions;
An endpoint handles all transactions related to the type of transfer for which it has been
configured.
Each transfer results in one or more transactions over the USB bus.
There are five kinds of transactions flowing across the bus in packets:
Unidirectional
Unidirectional
Unidirectional
Bidirectional
1. Setup Transaction
2. Data IN Transaction
3. Data OUT Transaction
4. Status IN Transaction
5. Status OUT Transaction
Direction
(1)
(2)
(2)
Not guaranteed
Not guaranteed
Not guaranteed
Guaranteed
Bandwidth
• Setup transaction → Data IN transactions →Status OUT transaction
• Setup transaction → Data OUT transactions →Status IN transaction
• Setup transaction → Status IN transaction
• Data IN transaction → Data IN transaction
• Data IN transaction → Data IN transaction
• Data IN transaction → Data IN transaction
• Data OUT transaction → Data OUT transaction
• Data OUT transaction → Data OUT transaction
• Data OUT transaction → Data OUT transaction
Endpoint Size
8,16,32,64
8-1024
8-1024
8-512
Error Detection
Yes
Yes
Yes
Yes
6289D–ATARM–3-Oct-11
Automatic
Retrying
Yes
Yes
No