SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 199

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

22.14 Static Memory Controller (SMC) User Interface
The SMC is programmed using the registers listed in
gram the parameters of the external device connected on it. In
16 bytes (0x10) are required per chip select.
The user must complete writing the configuration by writing any one of the SMC_MODE registers.
Table 22-9.
6289D–ATARM–3-Oct-11
0x10 x CS_number + 0x0C
0x10 x CS_number + 0x00
0x10 x CS_number + 0x04
0x10 x CS_number + 0x08
Offset
SMC Register Mapping
Register
SMC Setup Register
SMC Pulse Register
SMC Cycle Register
SMC Mode Register
Table
22-9. For each chip select, a set of 4 registers is used to pro-
Table
SMC_SETUP
SMC_PULSE
SMC_CYCLE
SMC_MODE
Name
22-9, “CS_number” denotes the chip select number.
AT91SAM9R64/RL64
Read/Write
Read/Write
Read/Write
Read/Write
Access
0x00000000
0x01010101
Reset State
0x00030003
0x10001000
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