L64724 LSI Logic Corporation, L64724 Datasheet - Page 15

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

1.1 General Description
Chapter 1
Introduction
This chapter introduces the L64724 Satellite Receiver from LSI Logic.
The L64724 is designed specifically to meet the needs of satellite
broadcast digital TV and is compliant with the European digital video
broadcast (DVB-S) standard and the technical specifications for DSS
systems.
The sections in this chapter are:
The L64724 Satellite Receiver contains two main blocks: a BPSK/QPSK
Demodulator and a Concatenated FEC Decoder. The BPSK/QPSK
module performs binary and quadrature phase-shift keying
(BPSK/QPSK) demodulation, a method of extracting a digital signal from
a phase-modulated analog signal.
The Concatenated FEC Decoder is a complete concatenated Forward
Error Correction decoder that uses a Viterbi inner code and a Reed-
Solomon outer code. The FEC decoding pipeline also contains all of the
necessary synchronization, deinterleaving, and scrambling functions for
a complete decoding solution. LSI Logic fabricates the L64724 using a
3.3-volt HCMOS process technology.
The L64724 provides maximum integration and flexibility for system
designers at a minimum cost. It contains an on-chip dual 6-bit analog-to-
digital converter (ADC) as well as an on-chip microcontroller. The
microcontroller controls the tuner as well as acquisition and tracking,
L64724 Satellite Receiver
Section 1.1, “General Description”
Section 1.2, “Typical Application”
Section 1.3, “Features Summary”
1-1