L64724 LSI Logic Corporation, L64724 Datasheet - Page 155
L64724
Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet
1.L64724.pdf
(294 pages)
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5.9.1 Eye Pattern and Soft Decision Thresholds
5.10 External Controls
When the PWR_REF register (Group 4, APR 24) is set to its
recommended value of 84, the value of the SCALE[7:0] bits should be
set to 158.
The useful part of the matched filter output signal is clipped for a larger
value of SCALE.
Because the power control loop automatically reduces the eye amplitude
for increasing noise, the DEMI and DEMQ signals include additional
headroom for resolving noise.
Equation 5.29
Equation 5.29
Equation 5.30
External controls have been added in order to simplify the design of the
analog front end, to reduce the amount of external circuitry, and to make
the board layout as simple as possible.
Five external control bits are available on the L64724. Four of these bits
(XCTR_OUT[3:0]) are output signals, and one (XCTR_IN) is an input
signal. The controls can be used to setup or to read parameters from
other components on the board (such as the RF front end and the tuner)
using only the L64724 microprocessor interface.
The four output controls use pins XCTR_OUT[3:0], which are
programmed by setting their respective bits in the XCTR[3:0] register
External Controls
SCALE
SCALE
=
=
2047
------------------------------------------------- -
2047
------------------------------------------------- -
and
2 PWR_REF
SCALE and PWR_REF Relationship for QPSK Systems
SCALE and PWR_REF Relationship for BPSK Systems
2 PWR_REF
Equation 5.30
1
1
+
+
------ -
N
E
------ -
N
E
s
o
s
o
–
–
1
1
relate SCALE and PWR_REF.
5-23
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