L64724 LSI Logic Corporation, L64724 Datasheet - Page 239

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

.
Group 4, APR 66–68 – Set to 0x51CAC0.
Set the SPI_Bias[22:0] value as shown in
Equation B.36
In the equation, VCR = 3/4 and OR = 50e6/21.3e6. The result is that
SPIBias = 5,360,320 (0x51.CAC0.)
Set Group 4, APR 68 to 0x51, APR 67 to 0xCA, and APR 66 to 0xC0.
Group 4, APR 69 – Set to 0x4B.
Set the timing lock threshold (CLK_LC_THSL[7:0]) value at 75 (0x4B.)
Table B.8
QPSK Demodulator and FEC Configuration Example: High Data Rates
Greater than 16
SPIBias
8 to 16
2 to 4
4 to 8
OR
gives the register values calculated for high data rates.
=
2
--------------------------
24
OR
VCR
less than 10
SPI Gain
50.0
35.0
15.0
Equation
B.36.
B-25