LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 106

• Manufacturer Part Number: LFEC10E-3F256C
• Description: Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
LatticeECP/EC sysIO Usage Guide
This command places the component PFU1 on the site named R1C7:
LOCATE COMP “PFU1” SITE “R1C7”;
This command places bus1 on ROW 3 and bus2 on COL4
LOCATE BUS “bus1” ROW 3;
LOCATE BUS “bus2” COL 4;
USE DIN CELL
This preference specifies the given register to be used as an input Flip Flop.
Syntax
USE DIN CELL <cell_name>;
where:
<cell_name> := string
Example
USE DIN CELL “din0”;
USE DOUT CELL
Specifies the given register to be used as an output Flip Flop.
Syntax
USE DOUT CELL <cell_name>;
where:
<cell_name> := string
Examples
USE DOUT CELL “dout1”;
PGROUP VREF
This preference is used to group all the components that need to be associated to one VREF pin within a bank.
Syntax
PGROUP <pgrp_name> [(VREF <vref_name>)+] (COMP <comp_name>)+;
LOCATE PGROUP <pgrp_name> BANK <bank_num>;
LOCATE VREF <vref_name> SITE <site_name>;
Example
PGROUP “vref_pg1” VREF “ref1” COMP “ah(0)” COMP “ah(1)” COMP “ah(2)” COMP “ah(3)” COMP “ah(4)” COMP
“ah(5)” COMP “ah(6)” COMP “ah(7)”;
PGROUP “vref_pg2” VREF “ref2” COMP “al(0)” COMP “al(1)” COMP “al(2)” COMP “al(3)” COMP “al(4)” COMP
“al(5)” COMP “al(6)” COMP “al(7)”;
LOCATE VREF “ref1” SITE PR29C;
LOCATE VREF “ref2” SITE PR48B;
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