LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 166

• Manufacturer Part Number: LFEC10E-3F256C
• Description: Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Example
Assume:
Then:
Let’s assume M =1. Then:
In this case, V=6 will satisfy all conditions.
PLL Usage in Module Manager and HDL
Including sysCLOCK PLLs in a Design
The sysCLOCK PLL capability can be accessed either through the Module Manager or directly instantiated in a
design’s source code. The following sections describe both methods.
Module Manager Usage
The LatticeECP/EC PLL is fully supported in Module Manager in the ispLEVER software. The Module Manager
allows the user to define the desired PLL using a simple, easy-to-use GUI. Following definition, a VHDL or Verilog
module that instantiates the desired PLL is created. This module can be included directly in the user’s design.
Figure 10-4 shows the main window when PLL is selected. The only entry required in this window is the module
name. After entering the module name, clicking on “Customize” will open the “General Options” window as shown
in Figure 10-5.
Figure 10-4. Module IP Manager Main Window
f
f
f
f
f
f
f
IN
OUT
VCO
PFD
OUT
VCO
PFD
= 40MHz, M = 2, N = 3, V = 5
= 40 / 2 = 20 or 60 / 3 = 20
= 40 / 1 or 120 / 3 = 40
= 40 * 3 / 2 = 60
= 40 * 3 / 1 = 120
= 60 * 5 = 300
= 120 * 5 = 600
(within range)
(out of range)
(out of range)
(within range)
(out of range)
(within range)
10-8
LatticeECP/EC sysCLOCK PLL
Design and Usage Guide