LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 181

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LFEC10E-3F256C

Manufacturer Part Number
LFEC10E-3F256C
Description
Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
LatticeECP-DSP sysDSP Usage Guide
MULTADD Module
The MULTADD GUI configures Multiplier Addition/Subtraction elements to be packed into the primitives
MULT18X18ADDSUB or MULT9X9ADDSUB. The Basic mode, shown in Figure 11-6, consists of one clock
(optional), one clock enable and one reset tied to all registers. Using the MULTADD you can span multiple sysDSP
Blocks. The SRI and SRO ports can only be enabled if inputs are less than 18 bits. The Advanced mode, shown in
Figure 11-7, provides finer control over the registers. In the Advanced mode you can control each register with
independent clocks, clock enables and resets.
Figure 11-6. MULTADD Mode Basic Set-up
Figure 11-7. MULTADD Mode Advanced Set-up
11-5

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