sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 151

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sc9s08mz16

Manufacturer Part Number
sc9s08mz16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
9.1.2
In addition to
considerations when migrating from a device that uses TPMV1.
9.1.3
The timer system in the SC9S08MZ16 includes a 4-channel TPM1, a separate 2-channel TPM2, and a
separate 2-channel TPM3. Timer system features include:
Freescale Semiconductor
8
For more information, refer to
You can write to the Channel Value register (TPMxCnV) when the timer is not in input capture
mode for TPMV2, not TPMV3.
In edge- or center- aligned modes, the Channel Value register (TPMxCnV) registers only update
when the timer changes from TPMMOD-1 to TPMMOD, or in the case of a free running timer
from 0xFFFE to 0xFFFF.
Also, when configuring the TPM modules, it is best to write to TPMxSC before TPMxCnV as a
write to TPMxSC resets the coherency mechanism on the TPMxCnV registers.
A total of up to eight channels:
— Each channel may be input capture, output compare, or buffered edge-aligned PWM
— Rising-edge, falling-edge, or any-edge input capture trigger
— Set, clear, or toggle output compare action
— Selectable polarity on PWM outputs
Each TPM may be configured for buffered, center-aligned pulse-width modulation (CPWM) on all
channels
Clock source to prescaler for each TPM is independently selectable as bus clock, fixed system
clock, or an external pin:
— Prescale taps for divide by 1, 2, 4, 8, 16, 32, 64, or 128
— External clock input: TPMCLK for use by TPM1, TPM2, and/or TPM3
16-bit free-running or up/down (CPWM) count operation
Writing to the Channel Value Register (TPMxCnV)
register...
Updating the Channel Value Register (TPMxCnV)
register in edge-aligned or center-aligned modes...
Reseting the coherency mechanism for the
Channel Value Register (TPMxCnV) register...
Configuring the TPM modules...
Migrating from TPMV1
Features
Section 9.1.1, “TPMV3 Differences from Previous
When...
Section 9.4.2.4, “Center-Aligned PWM
Table 9-2. Migrating to TPMV3 Considerations
SC9S08MZ16 MCU Data Sheet, Rev. 1
Timer must be in Input Capture mode.
Only occurs when the timer changes from
TPMMOD-1 to TPMMOD (or in the case of a free
running timer, from 0xFFFE to 0xFFFF).
Write to TPMxSC.
Write first to TPMxSC and then to TPMxCnV
register.
Mode.” [SE110-TPM case 4]
Action / Best Practice
Versions,” keep in mind the following
Chapter 9 Timer/PWM (S08TPMV3)
151

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