sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 35

• Manufacturer Part Number: sc9s08mz16
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

3.5.4
The LVD system is capable of generating either an interrupt or a reset when the supply voltage drops below
the LVD voltage. If the LVD is enabled in stop by setting the LVDE and the LVDSE bits, then the voltage
regulator remains active during stop mode. If the user attempts to enter stop2 with the LVD enabled for
stop, the MCU will instead enter stop3.
LVD is enabled.
3.5.5
When the MCU enters any stop mode, system clocks to the internal peripheral modules are stopped. Even
in the exception case (ENBDM = 1), where clocks are kept alive to the background debug logic, clocks to
the peripheral systems are halted to reduce power consumption. Refer to
specific information on system behavior in stop modes.
I/O Pins
Memory
ICG — In stop3 mode, the ICG enters its low-power standby state. The oscillator may be kept running
when the ICG is in standby by setting OSCSTEN. In stop2 mode, the ICG is turned off. The oscillator
cannot be kept running in stop2 even if OSCSTEN is set. If the MCU is configured to go into stop2 mode,
the ICG will be reset upon wake-up from stop and must be reinitialized.
TPM — When the MCU enters stop mode, the clock to the TPM1 and TPM2 modules stop. The modules
halt operation. If the MCU is configured to go into stop2 mode, the TPM modules will be reset upon
wake-up from stop and must be reinitialized.
ADC — When the MCU enters stop mode, the ADC will enter a low-power standby state unless the
asynchronous clock source, ADACK, is enabled. Conversions can occur in stop3 if ADACK is enabled.
If the MCU is configured to go into stop2 mode, the ADC will be reset upon wake-up from stop and must
be re-initialized.
Freescale Semiconductor
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Mode
Stop3
All I/O pin states remain unchanged when the MCU enters stop3 mode.
If the MCU is configured to go into stop2 mode, all I/O pins states are latched before entering stop.
All RAM and register contents are preserved while the MCU is in stop3 mode.
All registers will be reset upon wake-up from stop2, but the contents of RAM are preserved and
pin states remain latched until the PPDACK bit is written. The user may save any memory-mapped
register data into RAM before entering stop2 and restore the data upon exit from stop2.
The contents of the flash memory are non-volatile and are preserved in any of the stop modes.
LVD Enabled in Stop Mode
On-Chip Peripheral Modules in Stop Modes
PPDC
0
CPU, Digital
Peripherals,
Standby
Flash
Table 3-3. LVD Enabled Stop Mode Behavior
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
Standby
RAM
Table 3-3
ICG
Off
summarizes the behavior of the MCU in stop when the
Optionally on
ADC
Regulator
Active
Section 3.5.2, “Stop3
States held Optionally on
I/O Pins
Chapter 3 Modes of Operation
RTI
Mode” for
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