sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 86

• Manufacturer Part Number: sc9s08mz16
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

1
Note: Bits 7 through 2 are reserved bits that must always be written to 0.
Note: Bits 7 through 2 are reserved bits that must always be written to 0.
Chapter 6 Parallel Input/Output
6.7.2
In addition to the I/O control, port A pins are controlled by the registers listed below.
86
Bits 7 through 2 are reserved bits that must always be written to 0.
PTADDn
PTAPEn
Reset
Reset
Reset
Field
Field
1:0
1:0
W
W
W
R
R
R
Port A Pin Control Registers (PTAPE, PTASE, PTADS)
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read for
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
Internal Pullup Enable for Port A Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port A bit n.
1 Internal pullup device enabled for port A bit n.
R
R
R
0
0
0
7
7
7
Figure 6-13. Output Slew Rate Control Enable for Port A (PTASE)
Figure 6-11. Data Direction for Port A Register (PTADD)
R
R
R
0
0
Figure 6-12. Internal Pullup Enable for Port A (PTAPE)
0
6
6
6
Table 6-2. PTADD Register Field Descriptions
Table 6-3. PTADD Register Field Descriptions
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
R
R
R
0
0
0
5
5
5
R
R
R
0
0
0
4
4
4
Description
Description
R
R
R
3
0
3
0
3
0
R
R
R
0
0
0
2
2
2
1
PTADD1
PTAPE1
PTASE1
Freescale Semiconductor
0
0
0
1
1
1
PTADD0
PTAPE0
PTASE0
0
0
0
0
0
0