sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 88

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sc9s08mz16

Manufacturer Part Number
sc9s08mz16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Note: Bits 7 through 4 are reserved bits that must always be written to 0.
Note: Bits 7 through 4 are reserved bits that must always be written to 0.
Note: Bits 7 through 4 are reserved bits that must always be written to 0.
Chapter 6 Parallel Input/Output
6.7.4
In addition to the I/O control, port B pins are controlled by the registers listed below.
88
PTBDD[3:0]
PTBPE[3:0]
Reset
Reset
Reset
Field
Field
3:0
3:0
W
W
W
R
R
R
Port B Pin Control Registers (PTBPE, PTBSE, PTBDS)
Data Direction for Port B Bits — These read/write bits control the direction of port B pins and what is read for
PTBD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port B bit n and PTBD reads return the contents of PTBDn.
Internal Pullup Enable for Port B Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port B bit n.
1 Internal pullup device enabled for port B bit n.
R
R
R
0
0
0
7
7
7
Figure 6-18. Output Slew Rate Control Enable for Port B (PTBSE)
R
R
Figure 6-17. Internal Pullup Enable for Port B (PTBPE)
R
0
0
0
6
6
6
Figure 6-16. Data Direction for Port B (PTBDD)
Table 6-7. PTBDD Register Field Descriptions
Table 6-8. PTBPE Register Field Descriptions
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
R
R
R
0
0
0
5
5
5
R
R
R
0
0
0
4
4
4
Description
Description
PTBDD3
PTBPE3
PTBSE3
3
0
3
0
3
0
PTBDD2
PTBPE2
PTBSE2
0
0
0
2
2
2
PTBDD1
PTBPE1
PTBSE1
Freescale Semiconductor
0
0
0
1
1
1
PTBDD0
PTBPE0
PTBSE0
0
0
0
0
0
0

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