sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 79

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sc9s08mz16

Manufacturer Part Number
sc9s08mz16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6.2
Parallel I/O and pin control features, depending on package choice, include:
6.3
The SC9S08MZ16 has a total of 34 parallel I/O pins in seven ports (PTA–PTG). Not all pins are bonded
out in all packages. Consult the pin assignment in
I/O pins. All of these pins are available for general-purpose I/O when they are not used by other on-chip
peripheral systems.
After reset, the shared peripheral functions are disabled so that the pins are controlled by the parallel I/O.
All of the parallel I/O are configured as inputs (PTxDDn = 0). The pin control functions for each pin are
configured as follows: slew rate control enabled (PTxSEn = 1), low drive strength selected (PTxDSn = 0),
and internal pullups disabled (PTxPEn = 0).
The following paragraphs discuss each port and the software controls that determine each pin’s use.
6.3.1
Port A pins are general-purpose I/O pins. Parallel I/O function is controlled by the port A data (PTAD) and
data direction (PTADD) registers which are located in page zero register space. The pin control registers,
pullup enable (PTAPE), slew rate control (PTASE), and drive strength select (PTADS) are located in the
high page registers. Refer to
general-purpose I/O control and
Freescale Semiconductor
A total of 34 general-purpose I/O pins in seven ports
Hysteresis input buffers
Software-controlled pullups on each input pin
Software-controlled slew rate output buffers
Two port A pins
Four port B pins shared with ADC and TPM3
Six port C pins shared with MCLK and SCI2
Four port D pins shared with ADC
Eight port E pins shared with SCI1 and TPM1
Four port F pins shared with TPM1 and TPM2
Six port G pins shared with EXTAL and XTAL
Port A
Features
Pin Descriptions
Port A
MCU Pin:
Bit 7
R
Section 6.4, “Parallel I/O
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
Section 6.5, “Pin
R
6
Figure 6-2. Port A Pin Names
R
5
Chapter 2, “Pins and
Control” for more information about pin control.
Control” for more information about
R
4
R
3
Connections,” for available parallel
R
2
Chapter 6 Parallel Input/Output
PTA1
1
PTA0
Bit 0
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